The present invention relates generally to analog to digital converters and more specifically to low cost converters having improved accuracy and speed.
The use of a multiplexer coupled to an analog to digital converter through an operational amplifier buffer in order to convert some analog signal to a digital format is well known. By way of example, this procedure can be used anywhere one wishes to monitor an analog quantity such as pressure or temperature that can be converted into an electrical signal, either current or voltage, with the resulting output digital data displayed through a liquid crystal or the like or used to input an external machine such as a programmable controller. Very reliable systems having excellent operation characteristics can be provided by selecting a high performance multiplexer having low output leakage current along with an operational amplifier having a low offset voltage V.sub.OS however such systems are excessively expensive for many applications.
The overall cost of such a circuit could be significantly decreased by using inexpensive, low performance components if the cost of eliminating sources of error in the component parts can also be kept low. Such sources of error include the offset voltage V.sub.OS of the operational amplifier and, when the clock rate at which the converter operates is increased to optimize overall operation for given component parts, a comparator delay in the analog to digital converter. That is, running the analog to digital converter faster than it is normally used introduces a comparator delay which results in an error or offset. It has been suggested that this can be dealt with by placing a resistance in series with the integrating capacitor of the converter however this is unsatisfactory in that the required resistance is not only very large, it varies from one unit to another resulting in undesirable and expensive tailoring of each unit.